rtl-opt
Applies local RTL timing optimizations in the user's SystemVerilog style (CSE, hierarchical shared conditions, decode, bit-slice, balanced trees, late mux, equivalent arith rewrite). Use only when the user explicitly asks to optimize RTL, timing, critical path, slack, PPA, or names rtl-opt / /rtl-opt. Do not apply when generating or casually editing DUT. Do not apply to testbench.
Pinned to revision b8912d61ed73, so it is the text this page describes rather than whatever the author pushed since.
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