Skip to content

akira2963753/hdl-rtl

v0.1.0MIT

ASIC HDL skills: Verilog/SystemVerilog format, synthesizable DUT constraints, TESTBED/PATTERN generation, flow environment setup, preflight check before VCS/DC, and opt-in RTL timing local rewrites.

What this package declares

The file a client reads when it loads this plugin, exactly as this revision carries it.

plugin.json
{
  "$schema": "https://agent-plugins.org/schemas/1.0.0/plugin.schema.json",
  "name": "hdl-rtl",
  "version": "0.1.0",
  "description": "ASIC HDL skills: Verilog/SystemVerilog format, synthesizable DUT constraints, TESTBED/PATTERN generation, flow environment setup, preflight check before VCS/DC, and opt-in RTL timing local rewrites.",
  "author": {
    "name": "Marco",
    "email": "harry2963753@gmail.com"
  },
  "license": "MIT",
  "keywords": ["verilog", "systemverilog", "rtl", "asic", "dv", "testbench"]
}

What else this package ships

These files come with the package and this site does not publish them. They are listed so you know what is there before you install it.

  • 6other files
View on GitHub