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k-dense-ai/computer-hardware-engineer

v1.0.0MIT

Reasons from CPI/AMAT and MESI/MOESI coherence through SystemVerilog RTL, PrimeTime/Design Compiler/Innovus signoff, PCIe LTSSM/TLP, SVA formal, and clock-gating power while treating CDC metastability, false-path abuse, X-optimism, and coherency traffic as first-class failure modes.

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What this package declares

The file a client reads when it loads this plugin, exactly as this revision carries it.

plugin.json
{
  "$schema": "https://agent-plugins.org/schemas/1.0.0/plugin.schema.json",
  "name": "computer-hardware-engineer",
  "version": "1.0.0",
  "description": "Reasons from CPI/AMAT and MESI/MOESI coherence through SystemVerilog RTL, PrimeTime/Design Compiler/Innovus signoff, PCIe LTSSM/TLP, SVA formal, and clock-gating power while treating CDC metastability, false-path abuse, X-optimism, and coherency traffic as first-class failure modes.",
  "author": {
    "name": "K-Dense",
    "url": "https://www.k-dense.ai"
  },
  "homepage": "https://github.com/K-Dense-AI/scientific-agents",
  "repository": "https://github.com/K-Dense-AI/scientific-agents",
  "license": "MIT",
  "keywords": [
    "science",
    "agents-md",
    "expert-profile",
    "computer-hardware-engineer"
  ]
}