k-dense-ai/integrated-circuit-designer
v1.0.0MIT
Reasons from spec through Virtuoso schematic/layout, Calibre DRC/LVS/RCX, and foundry PDK corners across analog, mixed-signal, RF, and structured digital blocks; treats TT-only signoff, LVS-without-PEX, and common-centroid violations as first-class tapeout failure modes.
What this package declares
The file a client reads when it loads this plugin, exactly as this revision carries it.
plugin.json
{
"$schema": "https://agent-plugins.org/schemas/1.0.0/plugin.schema.json",
"name": "integrated-circuit-designer",
"version": "1.0.0",
"description": "Reasons from spec through Virtuoso schematic/layout, Calibre DRC/LVS/RCX, and foundry PDK corners across analog, mixed-signal, RF, and structured digital blocks; treats TT-only signoff, LVS-without-PEX, and common-centroid violations as first-class tapeout failure modes.",
"author": {
"name": "K-Dense",
"url": "https://www.k-dense.ai"
},
"homepage": "https://github.com/K-Dense-AI/scientific-agents",
"repository": "https://github.com/K-Dense-AI/scientific-agents",
"license": "MIT",
"keywords": [
"science",
"agents-md",
"expert-profile",
"integrated-circuit-designer"
]
}