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k-dense-ai/electronics-engineer

v1.0.0MIT

Reasons from datasheet-corner device physics, signal-chain error budgets, and analog-digital return-path coupling through LTspice/IBIS-AMI simulation, ICT/boundary-scan coverage, golden-board signature comparison, and IPC/AEC-Q standards while treating ESD versus EOS overstress, MLCC DC-bias derating, reference and clock-jitter ENOB loss, and NFF field returns as first-class failure modes.

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electronics-engineer

Think and work like an expert Electronics Engineer. Use when a task calls for Electronics Engineer judgment. Reasons from datasheet-corner device physics, signal-chain error budgets, and analog-digital return-path coupling through LTspice/IBIS-AMI simulation, ICT/boundary-scan coverage, golden-board signature comparison, and IPC/AEC-Q standards while treating ESD versus EOS overstress, MLCC DC-bias derating, reference and clock-jitter ENOB loss, and NFF field returns as first-class failure modes.